(a) Field of the Invention
The present invention relates to a semiconductor device and a method thereof. More particularly, the present invention relates to a transistor having a reverse spacer and a manufacturing method thereof.
(b) Description of the Related Art
Generally, the size of transistors used in integrated circuits of semiconductor devices has been reduced, and transistors of a nanometer scale (e.g., 130 nm, 110 nm, 90 nm, 65 nm or 45 nm) are now desired. For manufacturing nanometer scale transistors, an advanced apparatus and advanced technology are generally used. In particular, advanced technology for forming a very shallow junction and an advanced photolithography apparatus are generally used for manufacturing a nanometer scale transistor.
Furthermore, a higher channel doping concentration is generally beneficial when scaling down typical transistors. However, if the channel doping concentration is increased, mobility of a charge carrier decreases so the performance of the transistor may deteriorate.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention, and therefore, it may contain information that does not form prior art or other information that may be already known in this or any other country to a person of ordinary skill in the art.